Professor Lin and his students have published more than 100 articles in the areas of electronic design automation and integrated circuit designs. Most of them are archived in IEEE Xplore and ACM Digital Library.
2022~present Dean, College of Informatics, Yuan Ze University.
2008-present Professor, Department of Computer Science and Engineering, Yuan Ze University, Chung-Li, 320 Taiwan.
2017-2022 Director, International Program in Informatics for Bachelor, Yuan Ze University, Chung-Li, 320 Taiwan
2011-2017 Head, Department of Computer Science and Engineering, Yuan Ze University, Chung-Li, 320 Taiwan
1995-2008 Associate Professor, Department of Computer Science and Engineering, Yuan Ze University, Chung-Li, 320 Taiwan.
1994-1995 Research Associate, Application and Research Center of Information Technology, Tatung Institute of Technology, Taipei.
1992-1994 Research and Development Staff, Large Scale Computing Division, IBM, Poughkeepsie, New York, USA.
1986-1987 Research Assistant, ITRI, Hsin-Chu, Taiwan.
VLSI/CAD Laboratory was established in 1995. It focuses on developing algorithms (software) and design methodologies for Electronic Design Automation (EDA) of integrated circuits (or Computer-Aided VLSI Design). Due to the amazing advancement of semiconductor technologies, billions of transistors can be placed in a single chip. This enables us to design very powerful servers for cloud computing and networking and various products such as desktop PCs, HD TV, mobile phones, tablet PCs, notebooks, video/digital cameras, and other smart electronic devices. One of the enabling technologies of designing chips for these products is Electronic Design Automation (EDA). EDA software (tools) can be used to solve the problems encountered during synthesizing, analyzing, verifying and testing a circuit. We are seeking more powerful algorithms and design methodologies for solving these problems to minimize chip size and power consumption while optimizing chip performance. Currently, we especially focus on the problems related to standard cell layouts and library development, power minimization, timing performance optimization, manufacturing yield optimization, etc.
To participate in our research work, one should be at least a senior student or preferably a master/Ph.D. student who majors in computer science and engineering or electrical and electronic engineering.
- Optimizing standard cell layouts designed with sub-10nm process technologies.
- Automating standard cell layout design.
- Developing standard cell design methodologies for area, power, and performance.
- Quantizing routing resources for global routing of a circuit.
- Developing placement and routing algorithms for circuits designed with sub-10nm process technology, leveraging ML-based optimization.
- Developing placement and routing algorithms for heterogeneous 3D IC integration.
- Applying machine learning and AI methods to improve circuit design efficiency, accuracy, and automation.
- Best paper award, International Symposium on Quality Electronic Design, Santa Clara, CA, US, 2021.
- Best paper candidate, International Symposium on Quality Electronic Design, Santa Clara, CA, US, 2018.
- Outstanding paper award, Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), Beppu, Oita, Japan, 2012.
- Technical program committee member, International Conference on Computer-Added Design, 2021~2023
- Invited Talk, International Conference on Innovations in Engineering and Technology, Hyderabad, India, 2022
- Technical program committee member, International Symposium on Quality Electronic Design (ISQED), 2016~2024
- Session chair, International Symposium on Quality Electronic Design (ISQED), 2019
- Session chair, IEEE Computer Society Annual Symposium on VLSI, 2018
- Session chair, International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2017
- Contest Co-chair, CAD Contest at ICCAD, 2015~2017
- Technical program committee member, IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), 2012~2014
- Technical program committee member, IEEE International Conference on Computer Design (ICCD), 2012, 2013
- Session chair, ASPDAC 2013, 2014
- Session chair, ACM/IEEE Great Lakes Symposium on VLSI, 2014
- Organizer, Workshop on Electronic Design Automation, Taiwan, 2011~2013
- Technical program committee member, Workshop on Synthesis and System Integration of Mixed Information technologies (SASIMI), 2009, 2010, Japan
- Session chair, International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2007
- Workshop co-chair for International Workshop on Computer Architecture, VLSI, and Embedded Systems in conjunction with International Computer Symposium, Taipei, Dec. 4-6, 2006
- Session chair and program committee member, VLSI Design/CAD Symposium, annually held in Taiwan
1987-1992 Ph.D. Computer and Information Science, University of Minnesota, Minneapolis, Minnesota, USA.
1980-1984 BS., Computer Engineering, National Chiao-Tung University, Hsin-Chu, Taiwan.
Job Description
Develop AI/ML-based models for transistor-level placement and optimization
Apply deep learning and reinforcement learning techniques to placement problems
Analyze placement objectives such as area, power, timing, and congestion
Design and evaluate learning-based optimization strategies
Work with simulation and benchmarking data for VLSI layouts
Write research publications
Preferred Intern Educational Level
Master’s or PhD degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Basic understanding of VLSI design basics and digital/analog circuits
Background in machine learning / deep learning
Skill sets or Qualities
Proficiency in Python (PyTorch / TensorFlow)
Job Description
Develop and train deep learning models for medical image analysis
Work with medical imaging datasets for preprocessing, annotation, and evaluation
Implement CNNs and transformer-based architectures
Analyze model performance and prepare technical documentation
Assist in research paper writing and experimentation
Preferred Intern Educational Level
Graduate students in Computer Science, Electrical Engineering, Biomedical Engineering, or related fields
Basic knowledge of machine learning and deep learning
Familiarity with Python and deep learning frameworks (PyTorch / TensorFlow)
Interest in AI for healthcare
Skill sets or Qualities
Understanding of Deep Learning liberaries such as (PyTorch / TensorFlow
Experience with medical imaging datasets
Knowledge of image segmentation or classification
Understanding of model evaluation and interpretability