Mimi Lab: Micro & nanoscale Innovation of Memory-Logic Integration
Research Field
Sourav De, an assistant professor at NTHU, senior member of IEEE, and a recipient of the prestigious 2022 George E. Smith Award, is making significant strides in HfO2-based resistive and FE memories. He has published over 60 journal and conference papers on ferroelectric-related topics in the last 5 years. His pioneering research has focused on optimizing ultra-thin hafnium-zirconium oxide FE memory devices, particularly within sub-5 nm scales. By
developing innovative low-temperature furnace annealing techniques, he has enhanced the FE properties of 4 nm HZO devices, achieving remarkable polarization retention without degradation.
Furthermore, his work on monolithic 3D integration for complementary FET SRAM arrays has dramatically increased memory density, resulting in a staggering 57.19% improvement in TOPS/W and up to 19 times the performance per mm², which truly pushes the limits of computing-in-memory applications. Beyond memory optimization, De's contributions extend to advancing the functionality of FeCAPs and developing high-performance crossbar memory arrays for linear multiply-accumulate operations, which are critical for artificial intelligence applications. His exploration of the dynamics of oxygen vacancies in hafnia-based devices provides vital insights into enhancing performance and reliability. Additionally, his innovative use of FEthin-film transistors in monolithic 3D ICs to detect thermal fluctuations exemplifies his commitment to addressing energy efficiency challenges and device scalability. Through these groundbreaking efforts, Sourav De reinforces his reputation as a leader in FE memory and integrated semiconductor technologies, fostering exciting advancements for the physics community.
Our group comprises efficient, young, and enthusiastic researchers who will find, investigate, and solve problems for a better tomorrow. We are currently working on semiconductor devices, especially logic and memory devices. I am eager to collaborate with aspiring young scientists by hiring them under the scope of my faculty chair at NTHU, Taiwan, focusing on intriguing topics related to semiconductor memories. My goal is to supervise and provide a salary for these individuals and use this opportunity to learn and explore new ideas with them. Depending on the scope and timeline of the work, we can award the individual with a Master's or PhD degree. Taiwan has established itself as a global semiconductor research and production leader and is poised to continue this trajectory. As Taiwan aims to become an international hub for talented expatriates, it presents an opportunity for those seeking leadership roles to consider relocating there. Taiwan is known for its safety, especially towards foreigners, boasting an almost zero crime rate, exceptional medical facilities, and a centralized health insurance system with a nominal monthly premium. Additionally, professionals, students, and their families can benefit from this coverage with a meager monthly fee of 10-30 euros. Foreigners in Taiwan benefit from a low tax rate of 5%, and an equal contribution from their employers supplements the pension fund for those working in universities and schools.
These factors collectively make Taiwan an appealing place to study, thrive, and call home. Please email me if you want to embark on a new journey in Taiwan's semiconductor industry.
Please do the following before sending an email.
Please take a moment to review my publications. Afterward, please inform me of the area where you desire to work with me. Additionally, kindly provide a brief background description, your CV, and a cover letter. This will help me evaluate our compatibility for working together.
Please visit our lab website for more information
- Ferroelectric memories
- Neuromorphic computing
- Semiconductor memory devices
Please contact me for more details
Congratulations to our collaborator Yannick Raffel: Our Paper Titled "Lattice Scattering Related Flicker Noise in Silicon-doped Hafnium Oxide FeFETs" has been awarded the best poster award in VLSI-TSA 2024.
03.03.2024: Sourav De gave an invited talk to IEEE EDTM about the "Perspective Roadmap of FeFETs."
01.02.2024: Sourav De is elevated to IEEE Senior Member
10.12.2023:Sourav De received George. E. Smith award for his paper "Demonstration of Multiply-Accumulate Operation With 28 nm FeFET Crossbar Array" at IEDM 2023. A big thanks and kind regards to all his colleagues and collaborators from the paper.
Link of the paper: https://ieeexplore.ieee.org/document/9927401
Freely available online
Habilitation à Diriger des Recherches, Ecole Doctorale Génie Electrique, Electronique, Télécommunications
PhD, Institute of Microelectronics, National Cheng Kung University
Job Description
This internship targets the core R&D drivers of our project, providing specialized experience in ferroelectric materials and device integration. As an intern, you will contribute to scientific advancements under PhD-level guidance, driving the technological thrust in areas such as nanolaminates, InOx integration, and string optimization. This position suits PhD candidates or advanced graduate students interested in bridging experimental insights to architectural innovations.
Key Responsibilities:
- Investigate ferroelectric materials and nanolaminates for enhanced device performance .
- Support integration of InOx devices and development of low-temperature FeFETs .
- Optimize FeNAND string architectures, including program/erase (PG/ER) modeling and simulation.
- Analyze data from experiments and simulations to inform reliability and performance metrics.
- Participate in knowledge-sharing within a team of three PhD specialists, contributing to publications and technology transfer discussions.
Qualifications:
- Current enrollment in a PhD program in Electrical Engineering, Materials Science, Physics, or a comparable discipline.
- Demonstrated experience in ferroelectric devices, semiconductor integration, or memory modeling.
- Proficiency in tools such as TCAD, SPICE, or similar for device simulation and optimization.
- Strong background in data analysis and system-level modeling.
- Excellent problem-solving abilities and a commitment to rigorous scientific inquiry.
Preferred Intern Educational Level
BS/MS
Skill sets or Qualities
Understanding of MOSFETs.
Job Description
This internship targets the core R&D drivers of our project, providing specialized experience in ferroelectric materials and device integration. As an intern, you will contribute to scientific advancements under PhD-level guidance, driving the technological thrust in areas such as nanolaminates, InOx integration, and string optimization. This position suits PhD candidates or advanced graduate students interested in bridging experimental insights to architectural innovations.
Key Responsibilities:
- Investigate ferroelectric materials and nanolaminates for enhanced device performance .
- Support integration of InOx devices and development of low-temperature FeFETs .
- Optimize FeNAND string architectures, including program/erase (PG/ER) modeling and simulation.
- Analyze data from experiments and simulations to inform reliability and performance metrics.
- Participate in knowledge-sharing within a team of three PhD specialists, contributing to publications and technology transfer discussions.
Qualifications:
- Current enrollment in a PhD program in Electrical Engineering, Materials Science, Physics, or a comparable discipline.
- Demonstrated experience in ferroelectric devices, semiconductor integration, or memory modeling.
- Proficiency in tools such as TCAD, SPICE, or similar for device simulation and optimization.
- Strong background in data analysis and system-level modeling.
- Excellent problem-solving abilities and a commitment to rigorous scientific inquiry.
Preferred Intern Educational Level
MS/PhD
Skill sets or Qualities
MOSFET